The present invention relates to a substrate for a semiconductor apparatus, such as a SOI substrate or FET having a MFS structure (metal-film/ferroelectric-material-film/semiconductor layer structure), in which a crystalline insulation layer is provided on a silicon substrate with an insulation layer exhibiting an electrical insulation property or a micro machining property interposed therebetween such that semiconductor crystal layer or a ferroelectric crystal layer can be grown, and a manufacturing method therefor. The substrate for the semiconductor device in this invention includes a substrate which can be a complete base for a semiconductor device and a base on which crystalline semiconductor layer and a dielectric layer, the substrate partly having an insulative silicon compound layer or a crystalline insulation layer as will be described hereinafter, a substrate to be provided on a laminated semiconductor layer, and a substrate for micro machining having a crystalline insulation layer with an insulation layer to improve a micro machining property. Particularly, the substrate for the micro machine is used when machining is effected on top or bottom of the substrate to permit repetitive fine mechanical deformation or vibration. An example of the substrate for macro machining comprises a silicon vibrational plate and a monocrystal PZT film formed thereon, wherein a liquid chamber is formed by etching a bottom side (unimorph structure), or a cantilever structure for reflecting light.
As for a SOI substrate with which a semiconductor crystal layer is formed on an insulation layer, for example, there are known a method in which two silicon substrates 2 having oxide films formed thereon are pasted to each other, and one of the substrates are removed by abrasion or etching so that thin semiconductor layer remains, or oxygen or the like is injected to a predetermined depth by ion injection from the surface of the silicon substrate, and then an annealing process is carried out, so that insulation layer is implanted into the semiconductor substrate. On the other hand., in a semiconductor memory device using a ferroelectric material layer, a ferroelectric material layer is laminated on a semiconductor layer, with or without an insulation film therebetween, or on a surface of an electrode metal such as platinum or the like. In the case of a MFS structure in which a ferroelectric material layer is laminated on a semiconductor layer, an oxide film is produced between the ferroelectric material layer and the semiconductor layer with the result of deterioration of the crystallinity or mofology and increase of interface level density between the ferroelectric material layer and the semiconductor layer. Even if a ferroelectric material layer is laminated on an insulation film, it is not possible to grow a ferroelectric material layer having a sufficient crystallinity on an amorphous insulation film. With a method in which metal is oxidized, and simultaneously the silicon is also oxidized, a high quality insulation layer is not provided, and in addition, the crystal insulation layer thereon does not exhibit a sufficient orientation. In a manufacturing process for a semiconductor device, there is a case in which epitaxial growth of a semiconductor layer, a crystalline dielectric layer or the like is required on a semiconductor substrate with an insulation layer therebetween, but it is not possible to directly laminate a layer having a high crystallinity on the surface of an insulation layer. Recently, however, using said pasting method, a SOI method has been put into practice in which one of the silicon layer is thinned by abrasion, etching or water knife, but with this method, a very expensive process is required, so that substrate per se is expensive. For a structure for micro machine or the like, an inexpensive substrate and manufacturing method therefor are desired. In a method in which oxygen or the like in implanted in the surface layer portion of the semiconductor substrate, the deterioration of the surface of the semiconductor layer by the ion implanting is significant, and the ion injection is again expensive, and therefore, the same problems are involved. As for a method in which epitaxial growth of YSZ thin film is effected an a silicon substrate, there is method disclosed in SHINGAKU GIHOU (ED96-42, CPM36-27, May, 1996) or a method disclosed in Japanese Laid-open Patent Application Hei 07-150361. According to these methods, an insulation layer having a crystalline property can be provided on a silicon substrate, and a semiconductor layer or ferroelectric material layer can be formed on the surface through epitaxial growth. However, the YSZ thin film formed on the silicon substrate is a crystalline metal oxide involving ion movement, and therefore, electrical insulation and the etching stop property when used for micro machining, are poorer than the silicon oxide film or the silicon nitride film, with the result of slight deterioration of the performance. Japanese Laid-open Patent Application Hei 10-265948 discloses that amorphous silicon oxide film is forced on crystalline silicon, and a crystalline insulation layer is further formed. This method is equivalent to a technique of forming an amorphous silicon oxide layer and a crystalline insulation layer within oxygen ambience as disclosed in No. 167 KENKYUKAISHIRYO (42-43) in a 131st thin film Committee of Japan GAKUJUTU SINKOUKAI held in HAKUUNRO HOTEL, May 31-Jun. 1, 1993, and these methods involve a problem that resultant amorphous layer contains a large amount of impurity element because of introduction of oxygen during sputtering operation. Although the crystallinity of the produced crystalline insulation layer exhibits YSZ (111) matchable with silicon lattice matching, the orientation in the plane is not possible, so that no complete epitaxial layer can not be provided.
These and other objects, features and advantages of the present invention will be more apparent upon a consideration of the following description of the preferred embodiment of the present invention taken in conjunction with the accompanying drawings.
Accordingly, it is a principal object of the present invention to provide a substrate for a semiconductor device, SOI substrate and a manufacturing method capable of manufacturing such substrates with low cost, which is suitable for growth of a crystal layer such as a semiconductor layer, a ferroelectric material layer or the like on another semiconductor layer with an insulation layer therebetween in a semiconductor device manufacturing step, and an electrical insulation property relative to the silicon substrate which is the base, an etching stop property, or a repetitive vibration property for a micro actuator or the like, can be improved, with low cost.
According to an aspect of the present invention, there is provided a substrate for a semiconductor device comprising a crystalline silicon substrate; an insulative silicon compound layer thereon and a crystalline insulation layer on said insulative silicon compound layer, wherein said insulative silicon compound layer contains not more than 10 at % of component element of a material constituting said crystalline insulation layer, the component element being provided in said insulative silicon compound layer by diffusion
According to another aspect of the present invention, there is provided a SOI substrate comprising said substrate for the semiconductor device as defined in the above paragraph, further comprising a crystalline silicon on said crystalline insulation layer.
According to a further aspect of the present invention, there is provided a manufacturing method for a semiconductor device substrate comprising ejecting in non-active gas a metal oxide constituting a crystalline insulation layer; forming a crystal layer of a crystalline insulative material on a silicon substrate heated up to not lower than 400xc2x0 C.; forming an insulative silicon compound layer on said silicon substrate by oxygen diffusion from an oxide during said crystal layer formation step, oxygen diffusion during a temperature holding time after said crystal layer formation step and/or oxygen diffusion during cooling operation.
According to a further aspect of the present invention, there is provided a method for manufacturing SOI substrate comprising a method as defined in the above paragraph, wherein crystalline silicon film is formed on the crystalline insulation layer which is formed on the silicon substrate.
According to the present invention, a structure is provided in which a crystalline insulation layer is formed on a silicon crystal layer with an amorphous insulation film of silicon compound exhibiting good insulation property and etching property, and therefore, another semiconductor layer or crystalline dielectric layer can be formed thereon by epitaxial growth, and a three-dimensional semiconductor device, a complex semiconductor device, a high performance semiconductor memory device can be formed. A new highly integrated semiconductor devices can be manufactured with low cost. In addition, an oxide layer exhibiting a good etching property can be provided, and therefore, by combination with a highly oriented PZT, a micro actuator having a good vibration property can be formed. A new micro device can be manufactured with low cost.
These a other objects, features and advantageous of the present invention will become more apparent upon a consideration of the following description of the preferred embodiments of the present invention taken in conjunction with the accompanying drawings.